STM32LIB
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This file contains all the functions prototypes for the TIM firmware library. More...
#include "stm32f0xx.h"
Go to the source code of this file.
Classes | |
struct | TIM_TimeBaseInitTypeDef |
TIM Time Base Init structure definition. More... | |
struct | TIM_OCInitTypeDef |
TIM Output Compare Init structure definition. More... | |
struct | TIM_ICInitTypeDef |
TIM Input Capture Init structure definition. More... | |
struct | TIM_BDTRInitTypeDef |
TIM_BDTR structure definition. More... | |
Macros | |
#define | IS_TIM_ALL_PERIPH(PERIPH) |
#define | IS_TIM_LIST1_PERIPH(PERIPH) ((PERIPH) == TIM1) |
#define | IS_TIM_LIST2_PERIPH(PERIPH) |
#define | IS_TIM_LIST3_PERIPH(PERIPH) |
#define | IS_TIM_LIST4_PERIPH(PERIPH) |
#define | IS_TIM_LIST5_PERIPH(PERIPH) |
#define | IS_TIM_LIST6_PERIPH(PERIPH) |
#define | IS_TIM_LIST7_PERIPH(PERIPH) |
#define | IS_TIM_LIST8_PERIPH(PERIPH) |
#define | IS_TIM_LIST9_PERIPH(PERIPH) |
#define | IS_TIM_LIST10_PERIPH(PERIPH) |
#define | IS_TIM_LIST11_PERIPH(PERIPH) ((PERIPH) == TIM14) |
#define | TIM_OCMode_Timing ((uint16_t)0x0000) |
#define | TIM_OCMode_Active ((uint16_t)0x0010) |
#define | TIM_OCMode_Inactive ((uint16_t)0x0020) |
#define | TIM_OCMode_Toggle ((uint16_t)0x0030) |
#define | TIM_OCMode_PWM1 ((uint16_t)0x0060) |
#define | TIM_OCMode_PWM2 ((uint16_t)0x0070) |
#define | IS_TIM_OC_MODE(MODE) |
#define | IS_TIM_OCM(MODE) |
#define | TIM_OPMode_Single ((uint16_t)0x0008) |
#define | TIM_OPMode_Repetitive ((uint16_t)0x0000) |
#define | IS_TIM_OPM_MODE(MODE) |
#define | TIM_Channel_1 ((uint16_t)0x0000) |
#define | TIM_Channel_2 ((uint16_t)0x0004) |
#define | TIM_Channel_3 ((uint16_t)0x0008) |
#define | TIM_Channel_4 ((uint16_t)0x000C) |
#define | IS_TIM_CHANNEL(CHANNEL) |
#define | IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) |
#define | IS_TIM_PWMI_CHANNEL(CHANNEL) |
#define | TIM_CKD_DIV1 ((uint16_t)0x0000) |
#define | TIM_CKD_DIV2 ((uint16_t)0x0100) |
#define | TIM_CKD_DIV4 ((uint16_t)0x0200) |
#define | IS_TIM_CKD_DIV(DIV) |
#define | TIM_CounterMode_Up ((uint16_t)0x0000) |
#define | TIM_CounterMode_Down ((uint16_t)0x0010) |
#define | TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) |
#define | TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) |
#define | TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) |
#define | IS_TIM_COUNTER_MODE(MODE) |
#define | TIM_OCPolarity_High ((uint16_t)0x0000) |
#define | TIM_OCPolarity_Low ((uint16_t)0x0002) |
#define | IS_TIM_OC_POLARITY(POLARITY) |
#define | TIM_OCNPolarity_High ((uint16_t)0x0000) |
#define | TIM_OCNPolarity_Low ((uint16_t)0x0008) |
#define | IS_TIM_OCN_POLARITY(POLARITY) |
#define | TIM_OutputState_Disable ((uint16_t)0x0000) |
#define | TIM_OutputState_Enable ((uint16_t)0x0001) |
#define | IS_TIM_OUTPUT_STATE(STATE) |
#define | TIM_OutputNState_Disable ((uint16_t)0x0000) |
#define | TIM_OutputNState_Enable ((uint16_t)0x0004) |
#define | IS_TIM_OUTPUTN_STATE(STATE) |
#define | TIM_CCx_Enable ((uint16_t)0x0001) |
#define | TIM_CCx_Disable ((uint16_t)0x0000) |
#define | IS_TIM_CCX(CCX) |
#define | TIM_CCxN_Enable ((uint16_t)0x0004) |
#define | TIM_CCxN_Disable ((uint16_t)0x0000) |
#define | IS_TIM_CCXN(CCXN) |
#define | TIM_Break_Enable ((uint16_t)0x1000) |
#define | TIM_Break_Disable ((uint16_t)0x0000) |
#define | IS_TIM_BREAK_STATE(STATE) |
#define | TIM_BreakPolarity_Low ((uint16_t)0x0000) |
#define | TIM_BreakPolarity_High ((uint16_t)0x2000) |
#define | IS_TIM_BREAK_POLARITY(POLARITY) |
#define | TIM_AutomaticOutput_Enable ((uint16_t)0x4000) |
#define | TIM_AutomaticOutput_Disable ((uint16_t)0x0000) |
#define | IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) |
#define | TIM_LOCKLevel_OFF ((uint16_t)0x0000) |
#define | TIM_LOCKLevel_1 ((uint16_t)0x0100) |
#define | TIM_LOCKLevel_2 ((uint16_t)0x0200) |
#define | TIM_LOCKLevel_3 ((uint16_t)0x0300) |
#define | IS_TIM_LOCK_LEVEL(LEVEL) |
#define | TIM_OSSIState_Enable ((uint16_t)0x0400) |
#define | TIM_OSSIState_Disable ((uint16_t)0x0000) |
#define | IS_TIM_OSSI_STATE(STATE) |
#define | TIM_OSSRState_Enable ((uint16_t)0x0800) |
#define | TIM_OSSRState_Disable ((uint16_t)0x0000) |
#define | IS_TIM_OSSR_STATE(STATE) |
#define | TIM_OCIdleState_Set ((uint16_t)0x0100) |
#define | TIM_OCIdleState_Reset ((uint16_t)0x0000) |
#define | IS_TIM_OCIDLE_STATE(STATE) |
#define | TIM_OCNIdleState_Set ((uint16_t)0x0200) |
#define | TIM_OCNIdleState_Reset ((uint16_t)0x0000) |
#define | IS_TIM_OCNIDLE_STATE(STATE) |
#define | TIM_ICPolarity_Rising ((uint16_t)0x0000) |
#define | TIM_ICPolarity_Falling ((uint16_t)0x0002) |
#define | TIM_ICPolarity_BothEdge ((uint16_t)0x000A) |
#define | IS_TIM_IC_POLARITY(POLARITY) |
#define | TIM_ICSelection_DirectTI ((uint16_t)0x0001) |
#define | TIM_ICSelection_IndirectTI ((uint16_t)0x0002) |
#define | TIM_ICSelection_TRC ((uint16_t)0x0003) |
#define | IS_TIM_IC_SELECTION(SELECTION) |
#define | TIM_ICPSC_DIV1 ((uint16_t)0x0000) |
#define | TIM_ICPSC_DIV2 ((uint16_t)0x0004) |
#define | TIM_ICPSC_DIV4 ((uint16_t)0x0008) |
#define | TIM_ICPSC_DIV8 ((uint16_t)0x000C) |
#define | IS_TIM_IC_PRESCALER(PRESCALER) |
#define | TIM_IT_Update ((uint16_t)0x0001) |
#define | TIM_IT_CC1 ((uint16_t)0x0002) |
#define | TIM_IT_CC2 ((uint16_t)0x0004) |
#define | TIM_IT_CC3 ((uint16_t)0x0008) |
#define | TIM_IT_CC4 ((uint16_t)0x0010) |
#define | TIM_IT_COM ((uint16_t)0x0020) |
#define | TIM_IT_Trigger ((uint16_t)0x0040) |
#define | TIM_IT_Break ((uint16_t)0x0080) |
#define | IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) |
#define | IS_TIM_GET_IT(IT) |
#define | TIM_DMABase_CR1 ((uint16_t)0x0000) |
#define | TIM_DMABase_CR2 ((uint16_t)0x0001) |
#define | TIM_DMABase_SMCR ((uint16_t)0x0002) |
#define | TIM_DMABase_DIER ((uint16_t)0x0003) |
#define | TIM_DMABase_SR ((uint16_t)0x0004) |
#define | TIM_DMABase_EGR ((uint16_t)0x0005) |
#define | TIM_DMABase_CCMR1 ((uint16_t)0x0006) |
#define | TIM_DMABase_CCMR2 ((uint16_t)0x0007) |
#define | TIM_DMABase_CCER ((uint16_t)0x0008) |
#define | TIM_DMABase_CNT ((uint16_t)0x0009) |
#define | TIM_DMABase_PSC ((uint16_t)0x000A) |
#define | TIM_DMABase_ARR ((uint16_t)0x000B) |
#define | TIM_DMABase_RCR ((uint16_t)0x000C) |
#define | TIM_DMABase_CCR1 ((uint16_t)0x000D) |
#define | TIM_DMABase_CCR2 ((uint16_t)0x000E) |
#define | TIM_DMABase_CCR3 ((uint16_t)0x000F) |
#define | TIM_DMABase_CCR4 ((uint16_t)0x0010) |
#define | TIM_DMABase_BDTR ((uint16_t)0x0011) |
#define | TIM_DMABase_DCR ((uint16_t)0x0012) |
#define | TIM_DMABase_OR ((uint16_t)0x0013) |
#define | IS_TIM_DMA_BASE(BASE) |
#define | TIM_DMABurstLength_1Transfer ((uint16_t)0x0000) |
#define | TIM_DMABurstLength_2Transfers ((uint16_t)0x0100) |
#define | TIM_DMABurstLength_3Transfers ((uint16_t)0x0200) |
#define | TIM_DMABurstLength_4Transfers ((uint16_t)0x0300) |
#define | TIM_DMABurstLength_5Transfers ((uint16_t)0x0400) |
#define | TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) |
#define | TIM_DMABurstLength_7Transfers ((uint16_t)0x0600) |
#define | TIM_DMABurstLength_8Transfers ((uint16_t)0x0700) |
#define | TIM_DMABurstLength_9Transfers ((uint16_t)0x0800) |
#define | TIM_DMABurstLength_10Transfers ((uint16_t)0x0900) |
#define | TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00) |
#define | TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00) |
#define | TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00) |
#define | TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00) |
#define | TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00) |
#define | TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00) |
#define | TIM_DMABurstLength_17Transfers ((uint16_t)0x1000) |
#define | TIM_DMABurstLength_18Transfers ((uint16_t)0x1100) |
#define | IS_TIM_DMA_LENGTH(LENGTH) |
#define | TIM_DMA_Update ((uint16_t)0x0100) |
#define | TIM_DMA_CC1 ((uint16_t)0x0200) |
#define | TIM_DMA_CC2 ((uint16_t)0x0400) |
#define | TIM_DMA_CC3 ((uint16_t)0x0800) |
#define | TIM_DMA_CC4 ((uint16_t)0x1000) |
#define | TIM_DMA_COM ((uint16_t)0x2000) |
#define | TIM_DMA_Trigger ((uint16_t)0x4000) |
#define | IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) |
#define | TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) |
#define | TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) |
#define | TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) |
#define | TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) |
#define | IS_TIM_EXT_PRESCALER(PRESCALER) |
#define | TIM_TS_ITR0 ((uint16_t)0x0000) |
#define | TIM_TS_ITR1 ((uint16_t)0x0010) |
#define | TIM_TS_ITR2 ((uint16_t)0x0020) |
#define | TIM_TS_ITR3 ((uint16_t)0x0030) |
#define | TIM_TS_TI1F_ED ((uint16_t)0x0040) |
#define | TIM_TS_TI1FP1 ((uint16_t)0x0050) |
#define | TIM_TS_TI2FP2 ((uint16_t)0x0060) |
#define | TIM_TS_ETRF ((uint16_t)0x0070) |
#define | IS_TIM_TRIGGER_SELECTION(SELECTION) |
#define | IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) |
#define | TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) |
#define | TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) |
#define | TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) |
#define | TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) |
#define | TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) |
#define | IS_TIM_EXT_POLARITY(POLARITY) |
#define | TIM_PSCReloadMode_Update ((uint16_t)0x0000) |
#define | TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) |
#define | IS_TIM_PRESCALER_RELOAD(RELOAD) |
#define | TIM_ForcedAction_Active ((uint16_t)0x0050) |
#define | TIM_ForcedAction_InActive ((uint16_t)0x0040) |
#define | IS_TIM_FORCED_ACTION(ACTION) |
#define | TIM_EncoderMode_TI1 ((uint16_t)0x0001) |
#define | TIM_EncoderMode_TI2 ((uint16_t)0x0002) |
#define | TIM_EncoderMode_TI12 ((uint16_t)0x0003) |
#define | IS_TIM_ENCODER_MODE(MODE) |
#define | TIM_EventSource_Update ((uint16_t)0x0001) |
#define | TIM_EventSource_CC1 ((uint16_t)0x0002) |
#define | TIM_EventSource_CC2 ((uint16_t)0x0004) |
#define | TIM_EventSource_CC3 ((uint16_t)0x0008) |
#define | TIM_EventSource_CC4 ((uint16_t)0x0010) |
#define | TIM_EventSource_COM ((uint16_t)0x0020) |
#define | TIM_EventSource_Trigger ((uint16_t)0x0040) |
#define | TIM_EventSource_Break ((uint16_t)0x0080) |
#define | IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000)) |
#define | TIM_UpdateSource_Global ((uint16_t)0x0000) |
#define | TIM_UpdateSource_Regular ((uint16_t)0x0001) |
#define | IS_TIM_UPDATE_SOURCE(SOURCE) |
#define | TIM_OCPreload_Enable ((uint16_t)0x0008) |
#define | TIM_OCPreload_Disable ((uint16_t)0x0000) |
#define | IS_TIM_OCPRELOAD_STATE(STATE) |
#define | TIM_OCFast_Enable ((uint16_t)0x0004) |
#define | TIM_OCFast_Disable ((uint16_t)0x0000) |
#define | IS_TIM_OCFAST_STATE(STATE) |
#define | TIM_OCClear_Enable ((uint16_t)0x0080) |
#define | TIM_OCClear_Disable ((uint16_t)0x0000) |
#define | IS_TIM_OCCLEAR_STATE(STATE) |
#define | TIM_TRGOSource_Reset ((uint16_t)0x0000) |
#define | TIM_TRGOSource_Enable ((uint16_t)0x0010) |
#define | TIM_TRGOSource_Update ((uint16_t)0x0020) |
#define | TIM_TRGOSource_OC1 ((uint16_t)0x0030) |
#define | TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) |
#define | TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) |
#define | TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) |
#define | TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) |
#define | IS_TIM_TRGO_SOURCE(SOURCE) |
#define | TIM_SlaveMode_Reset ((uint16_t)0x0004) |
#define | TIM_SlaveMode_Gated ((uint16_t)0x0005) |
#define | TIM_SlaveMode_Trigger ((uint16_t)0x0006) |
#define | TIM_SlaveMode_External1 ((uint16_t)0x0007) |
#define | IS_TIM_SLAVE_MODE(MODE) |
#define | TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) |
#define | TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) |
#define | IS_TIM_MSM_STATE(STATE) |
#define | TIM_FLAG_Update ((uint16_t)0x0001) |
#define | TIM_FLAG_CC1 ((uint16_t)0x0002) |
#define | TIM_FLAG_CC2 ((uint16_t)0x0004) |
#define | TIM_FLAG_CC3 ((uint16_t)0x0008) |
#define | TIM_FLAG_CC4 ((uint16_t)0x0010) |
#define | TIM_FLAG_COM ((uint16_t)0x0020) |
#define | TIM_FLAG_Trigger ((uint16_t)0x0040) |
#define | TIM_FLAG_Break ((uint16_t)0x0080) |
#define | TIM_FLAG_CC1OF ((uint16_t)0x0200) |
#define | TIM_FLAG_CC2OF ((uint16_t)0x0400) |
#define | TIM_FLAG_CC3OF ((uint16_t)0x0800) |
#define | TIM_FLAG_CC4OF ((uint16_t)0x1000) |
#define | IS_TIM_GET_FLAG(FLAG) |
#define | IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000)) |
#define | IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) |
#define | IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) |
#define | TIM_OCReferenceClear_ETRF ((uint16_t)0x0008) |
#define | TIM_OCReferenceClear_OCREFCLR ((uint16_t)0x0000) |
#define | TIM_OCREFERENCECECLEAR_SOURCE(SOURCE) |
#define | TIM14_GPIO ((uint16_t)0x0000) |
#define | TIM14_RTC_CLK ((uint16_t)0x0001) |
#define | TIM14_HSEDiv32 ((uint16_t)0x0002) |
#define | TIM14_MCO ((uint16_t)0x0003) |
#define | IS_TIM_REMAP(TIM_REMAP) |
#define | TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer |
#define | TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers |
#define | TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers |
#define | TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers |
#define | TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers |
#define | TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers |
#define | TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers |
#define | TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers |
#define | TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers |
#define | TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers |
#define | TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers |
#define | TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers |
#define | TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers |
#define | TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers |
#define | TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers |
#define | TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers |
#define | TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers |
#define | TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers |
This file contains all the functions prototypes for the TIM firmware library.
Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at:
http://www.st.com/software_license_agreement_liberty_v2
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.