STM32LIB
stm32f0xx_syscfg.h
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1 
30 #ifndef __STM32F0XX_SYSCFG_H
31 #define __STM32F0XX_SYSCFG_H
32 
33 #ifdef __cplusplus
34  extern "C" {
35 #endif
36 
38 #include "stm32f0xx.h"
39 
47 /* Exported types ------------------------------------------------------------*/
48 /* Exported constants --------------------------------------------------------*/
49 
57 #define EXTI_PortSourceGPIOA ((uint8_t)0x00)
58 #define EXTI_PortSourceGPIOB ((uint8_t)0x01)
59 #define EXTI_PortSourceGPIOC ((uint8_t)0x02)
60 #define EXTI_PortSourceGPIOD ((uint8_t)0x03)
61 #define EXTI_PortSourceGPIOE ((uint8_t)0x04)
62 #define EXTI_PortSourceGPIOF ((uint8_t)0x05)
63 
64 #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
65  ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
66  ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
67  ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
68  ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
69  ((PORTSOURCE) == EXTI_PortSourceGPIOF))
70 
77 #define EXTI_PinSource0 ((uint8_t)0x00)
78 #define EXTI_PinSource1 ((uint8_t)0x01)
79 #define EXTI_PinSource2 ((uint8_t)0x02)
80 #define EXTI_PinSource3 ((uint8_t)0x03)
81 #define EXTI_PinSource4 ((uint8_t)0x04)
82 #define EXTI_PinSource5 ((uint8_t)0x05)
83 #define EXTI_PinSource6 ((uint8_t)0x06)
84 #define EXTI_PinSource7 ((uint8_t)0x07)
85 #define EXTI_PinSource8 ((uint8_t)0x08)
86 #define EXTI_PinSource9 ((uint8_t)0x09)
87 #define EXTI_PinSource10 ((uint8_t)0x0A)
88 #define EXTI_PinSource11 ((uint8_t)0x0B)
89 #define EXTI_PinSource12 ((uint8_t)0x0C)
90 #define EXTI_PinSource13 ((uint8_t)0x0D)
91 #define EXTI_PinSource14 ((uint8_t)0x0E)
92 #define EXTI_PinSource15 ((uint8_t)0x0F)
93 
94 #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
95  ((PINSOURCE) == EXTI_PinSource1) || \
96  ((PINSOURCE) == EXTI_PinSource2) || \
97  ((PINSOURCE) == EXTI_PinSource3) || \
98  ((PINSOURCE) == EXTI_PinSource4) || \
99  ((PINSOURCE) == EXTI_PinSource5) || \
100  ((PINSOURCE) == EXTI_PinSource6) || \
101  ((PINSOURCE) == EXTI_PinSource7) || \
102  ((PINSOURCE) == EXTI_PinSource8) || \
103  ((PINSOURCE) == EXTI_PinSource9) || \
104  ((PINSOURCE) == EXTI_PinSource10) || \
105  ((PINSOURCE) == EXTI_PinSource11) || \
106  ((PINSOURCE) == EXTI_PinSource12) || \
107  ((PINSOURCE) == EXTI_PinSource13) || \
108  ((PINSOURCE) == EXTI_PinSource14) || \
109  ((PINSOURCE) == EXTI_PinSource15))
110 
117 #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
118 #define SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01)
119 #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
120 
121 
122 #define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
123  ((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \
124  ((REMAP) == SYSCFG_MemoryRemap_SRAM))
125 
133 #define SYSCFG_DMARemap_TIM3 SYSCFG_CFGR1_TIM3_DMA_RMP /* Remap TIM3 DMA requests from channel4 to channel6,
134  available only for STM32F072 devices */
135 #define SYSCFG_DMARemap_TIM2 SYSCFG_CFGR1_TIM2_DMA_RMP /* Remap TIM2 DMA requests from channel3/4 to channel7,
136  available only for STM32F072 devices */
137 #define SYSCFG_DMARemap_TIM1 SYSCFG_CFGR1_TIM1_DMA_RMP /* Remap TIM1 DMA requests from channel2/3/4 to channel6,
138  available only for STM32F072 devices */
139 #define SYSCFG_DMARemap_I2C1 SYSCFG_CFGR1_I2C1_DMA_RMP /* Remap I2C1 DMA requests from channel3/2 to channel7/6,
140  available only for STM32F072 devices */
141 #define SYSCFG_DMARemap_USART3 SYSCFG_CFGR1_USART3_DMA_RMP /* Remap USART3 DMA requests from channel6/7 to channel3/2,
142  available only for STM32F072 devices */
143 #define SYSCFG_DMARemap_USART2 SYSCFG_CFGR1_USART2_DMA_RMP /* Remap USART2 DMA requests from channel4/5 to channel6/7,
144  available only for STM32F072 devices */
145 #define SYSCFG_DMARemap_SPI2 SYSCFG_CFGR1_SPI2_DMA_RMP /* Remap SPI2 DMA requests from channel4/5 to channel6/7,
146  available only for STM32F072 devices */
147 #define SYSCFG_DMARemap_TIM17_2 SYSCFG_CFGR1_TIM17_DMA_RMP2 /* Remap TIM17 DMA requests from channel1/2 to channel7,
148  available only for STM32F072 devices */
149 #define SYSCFG_DMARemap_TIM16_2 SYSCFG_CFGR1_TIM16_DMA_RMP2 /* Remap TIM16 DMA requests from channel3/4 to channel6,
150  available only for STM32F072 devices */
151 #define SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP /* Remap TIM17 DMA requests from channel1 to channel2 */
152 #define SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP /* Remap TIM16 DMA requests from channel3 to channel4 */
153 #define SYSCFG_DMARemap_USART1Rx SYSCFG_CFGR1_USART1RX_DMA_RMP /* Remap USART1 Rx DMA requests from channel3 to channel5 */
154 #define SYSCFG_DMARemap_USART1Tx SYSCFG_CFGR1_USART1TX_DMA_RMP /* Remap USART1 Tx DMA requests from channel2 to channel4 */
155 #define SYSCFG_DMARemap_ADC1 SYSCFG_CFGR1_ADC_DMA_RMP /* Remap ADC1 DMA requests from channel1 to channel2 */
156 
157 #define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \
158  ((REMAP) == SYSCFG_DMARemap_TIM16) || \
159  ((REMAP) == SYSCFG_DMARemap_USART1Rx) || \
160  ((REMAP) == SYSCFG_DMARemap_USART1Tx) || \
161  ((REMAP) == SYSCFG_CFGR1_TIM3_DMA_RMP) || \
162  ((REMAP) == SYSCFG_CFGR1_TIM2_DMA_RMP) || \
163  ((REMAP) == SYSCFG_CFGR1_TIM1_DMA_RMP) || \
164  ((REMAP) == SYSCFG_CFGR1_I2C1_DMA_RMP) || \
165  ((REMAP) == SYSCFG_CFGR1_USART3_DMA_RMP) || \
166  ((REMAP) == SYSCFG_CFGR1_USART2_DMA_RMP) || \
167  ((REMAP) == SYSCFG_CFGR1_SPI2_DMA_RMP) || \
168  ((REMAP) == SYSCFG_CFGR1_TIM17_DMA_RMP2) || \
169  ((REMAP) == SYSCFG_CFGR1_TIM16_DMA_RMP2) || \
170  ((REMAP) == SYSCFG_DMARemap_ADC1))
171 
179 #define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR1_I2C_FMP_PB6 /* Enable Fast Mode Plus on PB6 */
180 #define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /* Enable Fast Mode Plus on PB7 */
181 #define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /* Enable Fast Mode Plus on PB8 */
182 #define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /* Enable Fast Mode Plus on PB9 */
183 #define SYSCFG_I2CFastModePlus_I2C1 SYSCFG_CFGR1_I2C_FMP_I2C1 /* Enable Fast Mode Plus on PB10, PB11, PF6 and PF7(only for STM32F0031 and STM32F030 devices) */
184 #define SYSCFG_I2CFastModePlus_I2C2 SYSCFG_CFGR1_I2C_FMP_I2C2 /* Enable Fast Mode Plus on I2C2 pins, available only for STM32F072 devices */
185 #define SYSCFG_I2CFastModePlus_PA9 SYSCFG_CFGR1_I2C_FMP_PA9 /* Enable Fast Mode Plus on PA9 (only for STM32F031 and STM32F030 devices) */
186 #define SYSCFG_I2CFastModePlus_PA10 SYSCFG_CFGR1_I2C_FMP_PA10/* Enable Fast Mode Plus on PA10(only for STM32F031 and STM32F030 devices) */
187 
188 #define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \
189  ((PIN) == SYSCFG_I2CFastModePlus_PB7) || \
190  ((PIN) == SYSCFG_I2CFastModePlus_PB8) || \
191  ((PIN) == SYSCFG_I2CFastModePlus_PB9) || \
192  ((PIN) == SYSCFG_I2CFastModePlus_I2C1) || \
193  ((PIN) == SYSCFG_I2CFastModePlus_I2C2) || \
194  ((PIN) == SYSCFG_I2CFastModePlus_PA9) || \
195  ((PIN) == SYSCFG_I2CFastModePlus_PA10))
196 
197 
205 #define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK
206 #define SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK
207 #define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK
209 #define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \
210  ((CONFIG) == SYSCFG_Break_SRAMParity) || \
211  ((CONFIG) == SYSCFG_Break_Lockup))
212 
221 #define SYSCFG_FLAG_PE SYSCFG_CFGR2_SRAM_PE
222 
223 #define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_PE))
224 
225 
226 #ifdef __cplusplus
227 }
228 #endif
229 
230 #endif /*__STM32F0XX_SYSCFG_H */
231 
240 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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