STM32LIB
Macros

Macros

#define SYSCFG_Break_PVD   SYSCFG_CFGR2_PVD_LOCK
 
#define SYSCFG_Break_SRAMParity   SYSCFG_CFGR2_SRAM_PARITY_LOCK
 
#define SYSCFG_Break_Lockup   SYSCFG_CFGR2_LOCKUP_LOCK
 
#define IS_SYSCFG_LOCK_CONFIG(CONFIG)
 

Detailed Description

Macro Definition Documentation

#define SYSCFG_Break_PVD   SYSCFG_CFGR2_PVD_LOCK

Connects the PVD event to the Break Input of TIM1, not available for STM32F030 devices

#define SYSCFG_Break_SRAMParity   SYSCFG_CFGR2_SRAM_PARITY_LOCK

Connects the SRAM_PARITY error signal to the Break Input of TIM1

#define SYSCFG_Break_Lockup   SYSCFG_CFGR2_LOCKUP_LOCK

Connects Lockup output of CortexM0 to the break input of TIM1

#define IS_SYSCFG_LOCK_CONFIG (   CONFIG)
Value:
(((CONFIG) == SYSCFG_Break_PVD) || \
((CONFIG) == SYSCFG_Break_SRAMParity) || \
((CONFIG) == SYSCFG_Break_Lockup))
#define SYSCFG_Break_SRAMParity
Definition: stm32f0xx_syscfg.h:206
#define SYSCFG_Break_Lockup
Definition: stm32f0xx_syscfg.h:207
#define SYSCFG_Break_PVD
Definition: stm32f0xx_syscfg.h:205